Home › Catalogue › XiangShan RISC-V CPU (ICT-CAS / BOSC)
XiangShan RISC-V CPU (ICT-CAS / BOSC)
ChinaIndustrial stack evidence A verified
Open-source high-performance RISC-V processor in Chisel, Mulan PSL v2 (docs CC-BY-4.0); copyright ICT-CAS (2020-2026), BOSC (2021-2026), Peng Cheng Laboratory (2020-2022). Kunminghu generation under development (v2 recommended for downstream use).
- since
- 2019/2020
- scale
- self-reported: within ~8% of Arm Neoverse N2 (press; unverified)
- note
- Governance: research institute plus non-profit BOSC; public research funding presumed, not documented here. Performance claim unverified. Foreign contributors: not documented.